在Bar(0x10)MMIO 或 Bar(0x20)IO的位置都可以
1.Offset:00h下FFh //reset
2.Offset:04h下smbus address (read bit0:1 , Ex : read memory DIMM0 address A1h)
3.Offset:03h下要讀的byte的index
4.Offset:02h下48h read byte command, 4Ch read word command, 54h read block command)
5.Offset:05讀取spd data
針對DDR4 SPD 超過256byte的讀法需要做Switch page (先下dummy cmd to switch page在下正常的SPD address to read)
#define SPD_PAGE_ADDRESS_0 (0x6C)
#define SPD_PAGE_ADDRESS_1 (0x6E)
//Dummy cmd to switch
offset 00 下ff 先清status
offset 04 下6e page1
offset 02 下48 會看到offset00 變44 or 42
//Normal read SPD data from page1 - index 40h
再來讀index 40
offset 00 下 ff 清status
offset 04 下 a1
offset 03 下 40
offset 02 下 48
看offset00 應該要42 表 success
參考資料 :
- Trying to read DDR4 SPD? They have 2 pages of 256 bytes each, and you need a dummy write to a special predefined address 0x6E to switch all SPD chips to page 1 (where your byte 320 is located), and than write to 0x6C switch them back to page 0 (to prevent an SPD read failure during next boot). Read this datasheet on page 12 for more info.
關於SMBUS讀取SPD前, 須注意是否有 SPDWD.
SPD Write Disable (SPDWD): When this bit is set to 1, writes to SMBus addresses
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